The fdp handles all graphics rendering, except for final color lookup and alpha blending.
For each screen pixel, the fdp outputs two color indexes. these are used as addresses for color ram, and the resulting colors are sent to the fda for blending.
The four ram chips to the left of the fdp are the sprite framebuffer.
The two ram chips above the fdp are accessible to the cpu.
These store the tilemaps, list of sprites to render, text/pixel data, and line effects.
Pinout
note: some of these pin assignments are only approximately correct
1
i
CS? (pal1.21)
Cpu Interface
2
i
AS? ic9.3 (cpu.dsack0 && .dsack1 && .as)
3
i
DS
4
i
A14
5
i
A13
6
i
A12
7
i
A11
8
i
A10
9
i
A9
10
VCC
11
i
A8
12
io
fcm.114 A?/D15?
13
io
fcm.113 A?/D14?
14
io
fcm.112 A?/D13?
15
GND
16
io
fcm.111 A?/D12?
17
io
fcm.96 A?/D11?
18
io
fcm.95 A?/D10?
19
io
fcm.94 A?/D9?
20
io
fcm.93 A?/D8?
21
io
fcm.32 A?/D7?
22
io
fcm.91 A?/D6?
23
io
fcm.89 A?/D5?
24
io
fcm.88 A?/D4?
25
io
fcm.87 A?/D3?
26
io
fcm.86 A?/D2?
27
GND
28
io
fcm.85 A?/D1?
29
io
fcm.84 A?/D0?
30
o
UW
Graphics Ram
31
o
LW
32
o
CE
33
o
A16
34
io
A15/D15
35
io
A14/D14
36
io
A13/D13
37
io
A12/D12
38
GND
39
io
A11/D11
40
io
A8/D10
41
io
A9/D9
42
io
A10/D8
43
VCC
44
io
A7/D7
45
io
A6/D6
46
io
A5/D5
47
io
A4/D4
48
io
A3/D3
49
io
A2/D2
50
io
A1/D1
51
io
A0/D0
52
GND
53
io
A0/D0
Sprite Framebuffer Ram 1
54
io
A1/D1
55
io
A2/D2
56
io
A3/D3
57
io
A4/D4
58
io
A5/D5
59
io
A6/D6
60
GND
61
VCC
62
io
A7/D9
63
io
D10
64
io
D11
65
io
D12
66
io
D13
67
o
R/W
68
io
A0/D0
Sprite Framebuffer Ram 2
69
io
A1/D1
70
io
A2/D2
71
io
A3/D3
72
io
A4/D4
73
GND
74
io
A5/D5
75
io
A6/D6
76
io
A7/D9
77
io
D10
78
io
D11
79
io
D12
80
io
D13
81
o
R/W
82
io
A0/D0
Sprite Framebuffer Ram 3
83
io
A1/D1
84
GND
85
io
A2/D2
86
io
A3/D3
87
io
A4/D4
88
io
A5/D5
89
io
A6/D6
90
io
A7/D9
91
io
D10
92
io
D11
93
io
D12
94
io
D13
95
o
R/W
96
GND
97
VCC
98
io
A0/D0
Sprite Framebuffer Ram 4
99
io
A1/D1
100
io
A2/D2
101
io
A3/D3
102
io
A4/D4
103
io
A5/D5
104
io
A6/D6
105
io
A7/D9
Sprite Framebuffer Ram 4
106
io
D10
107
io
D11
108
GND
109
io
D12
110
io
D13
111
o
R/W
112
o
RAS
Sprite Framebuffer Ram Common
113
i
? ic9.8 = 116
114
VCC
115
o
OE
116
o
CAS
117
i
? ic9.11 = 112
118
o
frame pulse
119
GND
120
o
video sync
121
i
? trigger something, from pal7.19
122
i
? pullup via RB1.9
123
i
pixel clock (6.6715 MHz)
124
i
half-pixel clock (13.343 MHz)
125
io
A0/D0
Graphics Rom Bus
126
io
A1/D1
127
io
A2/D2
128
io
A3/D3
129
io
A4/D4
130
io
A5/D5
131
io
A6/D6
132
io
A7/D7
133
GND
134
io
A8/D8
135
io
A9/D9
136
io
A10/D10
137
io
A11/D11
138
io
A12/D12
139
io
A13/D13
140
io
A14/D14
141
io
A15/D15
142
GND
143
io
A16/D16
144
io
A17/D17
145
io
A18/D18
146
io
A19/D19
147
VCC
148
io
A20/D20
149
io
A21/D21
150
io
A22/D22
151
io
A23/D23
152
io
D24
153
GND
154
io
D25
155
io
D26
156
io
D27
157
io
D28
Graphics Rom Bus
158
io
D29
159
io
D30
160
io
D31
161
io
D32
162
io
D33
163
io
D34
164
GND
165
VCC
166
io
D35
167
io
D36
168
io
D37
169
io
D38
170
io
D39
171
io
D40
172
io
D41
173
io
D42
174
io
D43
175
io
D44
176
io
D45
177
GND
178
io
D46
179
io
D47
180
o
tile/sprite
181
o
? fda.98
Output to Fda / Color Ram
182
o
color0
183
o
color1
184
o
color2
185
o
color3
186
o
color4
187
o
color5
188
GND
189
o
color6
190
o
color7
191
o
color8
192
o
color9
193
o
color10
194
o
color11
195
o
color12
196
o
alpha0
197
o
alpha1
198
o
alpha2
199
o
alpha3
200
GND
201
VCC
202
o
blur
203
o
mode0
204
o
mode1
205
o
? ic65.13
206
i
RESET
207
i
same as fdp.180
208
i
? fcm.99, fda.26
Notes
graphics ram A8/A10 are swapped (presumably for routing reasons)
pin 180 and 207 connect to cartridge A.89 and C.3, fdp.207, and pal9.11.
"frame pulse" goes high near the end of scanline 255 (just after the last visible pixel) and low near the end of scanline 4 (11 scanlines later), and is what controls the vblank interrupts sent the the CPU. It is not the same as vertical sync.
PAL D77-07 (undumped)
This PAL is only connected to the FDP.
It takes the video sync signal and frame pulse, and outputs something to the next pin of the FDP.
It seems to be using its macroblocks as a binary counter to create adelayed low pulse that begins 16px before the end of vertical sync (around the middle of scanline 6) and lasts 232px.
TC0630 FDP